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RECERCAT Home > Universitat de Barcelona > Electrònica > Articles publicats en revistes (Electrònica) > View document

To access the full text documents, please follow this link: http://hdl.handle.net/2445/8761

Title:	Application of a floating well concept to a latch-up-free, low-cost, smart power high-side switch technology
Author:	Bafleur, Marise; Buxo, Juan; Puig i Vidal, Manuel; Givelin, P.; Macary, V.; Sarrabayrouse, G.
Other authors:	Universitat de Barcelona
Abstract:	The aim of this brief is to present an original design methodology that permits implementing latch-up-free smart power circuits on a very simple, cost-effective technology. The basic concept used for this purpose is letting float the wells of the MOS transistors most susceptible to initiate latch-up.
Publication date:	2010-05-04
Subject(s):	Circuits integrats Circuits electrònics MOS integrated circuits Power integrated circuits Switching circuits
Rights:	(c) IEEE, 1993
Document type:	Article
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